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Materials Contributing to Warpage Mitigation & Stress Relief in Advanced Semiconductor Packages (1)
This article focuses on warpage, a major technical issue in advanced semiconductor packages discussed previously in Part 4.
In advanced semiconductor packaging, heterogeneous materials such as chips, interposers, and package substrates—each with different coefficients of thermal expansion (CTEs)—are laminated together. During manufacturing, thermal histories cause differential contraction among these materials, resulting in warpage significant enough to affect design accuracy. This warpage can lead directly to connection failures and reduced product lifetime.
To effectively suppress warpage, it is essential not only to optimize design and manufacturing processes but also to engineer material properties—particularly by matching the CTEs of constituent materials.

Below, we introduce several materials that contribute to warpage reduction.
Materials Contributing to Warpage Mitigation
Package Substrate Materials (MCL Core / Prepreg)
Package substrate materials are used in the substrate that provides mechanical support to the overall semiconductor package and relays electrical connections between the chip or interposer and the printed circuit board (PCB). In advanced semiconductor packages, chip or interposer terminals are arranged at extremely fine pitches and at very high density. In contrast, the terminals on motherboards and other PCBs are much larger. The package substrate plays a key role in bridging this dimensional gap through multilayer wiring.
As device structures become increasingly complex, the package substrate—sandwiched between the chip, interposer, and PCB, all with different CTEs—tends to accumulate internal stress during thermal processes. As a result, the properties of the package substrate significantly influence the overall package warpage.
Resonac offers a wide lineup of package substrate materials, including formulations for advanced semiconductor packages and high-frequency applications. Among them, the MCL-E-795G series, developed specifically for advanced packages, leverages Resonac’s proprietary polymer-blend and high-filler-loading technology to achieve high modulus and low thermal expansion—both key factors in suppressing warpage. These materials contribute to reducing overall package warpage and ensuring long-term product reliability.
Learn more:
MCL Product Appearance

Solder Resist (SR)
Solder resist is formed on the topmost surface of the package substrate to protect wiring both physically and electrically while ensuring circuit insulation.
Photosensitive solder resist forms openings for chip-to-substrate connections through exposure and development processes. This method enables precise formation of openings. Additionally, film-type solder resist offers superior ability to planarize the uneven surface of copper traces, compared to liquid-type materials.
In advanced semiconductor packaging, chip-to substrate or interposer-to substrate connections involve extremely high terminal densities. Therefore, the substrate surface requires both high-precision opening formation and excellent planarization. Film type photosensitive solder resist has become widely adopted to meet these requirements. By using film-type solder resist, manufacturers can ensure accurate connections for densely arranged terminals while achieving superior planarization of the substrate surface—dramatically improving subsequent chip-mounting performance.
Resonac’s SR-F series is a film-type-photosensitive solder resist designed to address the technical challenges of advanced semiconductor packages. With its low CTE and low cure shrinkage, the SR-F series suppresses substrate warpage, while its excellent resolution enables fine-pitch opening formation. This high-precision patterning capability supports further terminal densification in next-generation semiconductor devices, such as those used for AI and HPC applications.
Learn more:
SR-F Series Product Appearance

Next Topic
In the next installment, we will continue to introduce materials technologies that support warpage mitigation in advanced semiconductor packages.
Published: April 17, 2026
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