Semiconductor / Electronics Related Technologies
Material DesignTechnology
Design functional materials by understanding the functional expression and physical property control factors.
Resin Design: Technology that controls the higher order strures and physical properties of resins
Multilayer Base Materials
Low ETC,low elastic resins with structure control
As an example of resin design for multilayer base materials, controlling the two-component system structure consisting of high- and low-elasticity segments enables the materials to achieve both high-heat stability and low thermal-expansion coefficient properties.
Resin design model
Semiconductor chip mounted on a test substrate and product image
Particle Design：Technology that controls particle structures and surface conditions
Polishing Particles for Semiconductors (CMP Slurry)
Cerium oxide slurry controlling particles size at a nano-level
CMP Slurry used in semiconductor polishing processes boast a high removal rate despite their nano-particles size, and precisely control particle size distribution to greatly suppress scratches.
Nano-ceria and calcined ceria
Product image and CMP process
Composite Material Design：Technology that realizes higher strength and new functions by combining materials with different properties
Die Bonding Films
Semiconductor packaging materials using reaction-induced polymer alloys
Film control at each state of reaction of the phase-separated structures (sea-island structures) achieves both detachability in the manufacturing process and stable bonding/fixing after packaging.
Phase-separated structures at each stage
Image of product use
Chemical Process Technology
Create materials.
Separation and Purification: Technology that separates and purifies target substances and compounds
Compounding: Technology that uniformly compounds and disperses substances and materials
Coating & Extrusion: Technology that shapes single- and multi-layer films for processing and handling
Impregnated Coating
Technology that uniformly impregnates permeable substrates with a liquid resin
After impregnation with a liquid resin, adjusting the deposition amount and coating surface with an opposing roll
⇒Providing prepregs with superior impregnation, smooth surfaces, and uniformly thick resin layers on both sides of the substrates.
Prepregs (insulation sheet for printed wiring board materials)
High-purity gases Synthesis Technology
We manufacture High-purity gases for semiconductors.
Fluorine chemicals technology・High purification technology
Fluorine is an atom that can easily combine with any element. Utilizing such characteristics of fluorine, our fluorine technologies are applied to various products.
- Fluorine synthesis technology 2HF→F2＋H2
- Distillation / Extraction / Filtration
- Fluorine compound synthesis technology (gas phase, liquid phase)
- Technology to treat and clean the inside of containers
- Plant construction and mass production technology
- Sensitive analysis technology LC, GC, ICP-MS
Plant for synthesizing fluorine compounds
Product image & Sensitive analysis technology
Epitaxial wafer Technology (SiC)
Mass Production Technology for next-generation green power semiconductor materials
Single crystal growth, Epitaxial growth, Wafering and Polishing, Defect and dislocation control
Single crystal growth, Epitaxial growth
Growth of the same atomic structure as the underlying crystal. High crystalline quality by the thermal control at high temperature condition.
Wafering and Polishing, Defect and dislocation control
High flatness and smooth surface by the sophisticated processing. Elimination of the killer defects by dislocation conversion.
The above-mentioned technologies result in high productivity/performance/reliability of SiC power device
Process flow of SiC epitaxial wafer
Transmission electron microscope Image of epitaxial layer surface (cross-sectional lattice image), Inset: Product image of Φ150mm SiC wafers*1 (left), and Φ200mm SiC wafers *2(right)
- *1 Launches Mass Production of 6-inch SiC Single Crystal Wafers
- *2 Starts to Ship Samples of 200mm SiC Epi-wafers
Energy Assisted Magnetic Recording
Possible solution to overcome the magnetic recording trilemma*1
Assisted Recording New recording scheme to enhance writability by applying heat/microwave to the medium.
HAMR: Heat Assisted Magnetic Recording
- HAMR uses near-field light to locally heat a recording layer to assist magnetization reversal.
MAMR: Microwave Assisted Magnetic Recording
- MAMR applies a microwave field to a recording layer to reduce the magnetic field to reverse magnetization.
By optimizing media design for those assisted recording schemes, areal density up to 5-6Tbit/inch2 can be expected in the future.
HAMR
MAMR
TEM image of HAMR medium*2
- *1 Trilemma: Conflicting requirements of small grains, thermal stability, and writability to increase recording density.
- *2 Develops HAMR-Technology-based HD Media
Packaging Solution Center
The square for generating innovation with collaborator
PSC capabilities for FO-WLP/PLP
Test vehicle Fabrication
- RDL fabrication
- Die mount (Face up/down mount, Flip-Chip Bonding）
- Molding (Compression / Transfer)
Material
- Pre applied underfill Film（Non conductive type）
- Underfill material（for capillary underfill or molded underfill）
- Molding Compound（for compression or transfer）
- Package substrate Core material（Low CTE）
- Prepreg material（Low Df available）
- Solder resist（Liquid or film）
Test vehicle designing
Simulation
PSC capabilities for 2.1/2.5D
Test vehicle Fabrication
- Flip-Chip Bonding Dispensing
- Thermal-Com. Bonding Molding (Compression / Transfer)
- RDL fabrication
Material
- Pre applied underfill Film (Non conductive type)
- Underfill material (for capillary underfill or molded underfill)
- Molding Compound (for compression or transfer)
- Package substrate Core material (Low CTE)
- Prepreg material (Low Df available)
- Solder resist (Liquid or film)
Test vehicle designing
Simulation
Packaging Solution Center collaboration with collaborator for new technology
Inducing innovation by promoting co-development
Process evaluation by bringing each company’s technical challenge
Plan and action on new technology which can meet Semiconductor industry’s trend
Consortium of the next generation packaging
[JOINT] : Jisso Open Innovation Network of Tops
