TOPPAN Joins the US-JOINT Consortium for Next-Generation Semiconductor Packaging
Strengthening technology development for package substrates, accelerating R&D by Japanese and American companies
December 10, 2024
Resonac Holdings Corporation
Resonac Corporation (President: Hidehito Takahashi, hereinafter referred to as "Resonac"), which took the lead in the establishment of the US-JOINT consortium*1 for next-generation semiconductor packaging, is pleased to announce that TOPPAN Inc. (President: Masanori Saito, hereinafter referred to as "TOPPAN") has newly joined the consortium. With this addition, US-JOINT now comprises 11 companies from Japan and the United States. By adopting TOPPAN's advanced technical capabilities and expertise in package substrates, US-JOINT consortium’s research and development on next-generation semiconductor packaging will be further accelerated.
Next-generation semiconductors, particularly those aimed at the rapidly growing AI market, are achieving enhanced performance through cutting-edge packaging technologies such as 2.5D and 3D*2. In recent years, not only semiconductor manufacturers but also major tech companies, including GAFAM and fabless companies, have been creating the latest concepts in semiconductor packaging. US-JOINT will collaborate with these companies to validate the latest concepts in semiconductor packaging. US-JOINT plans to establish a research and development center equipped with clean rooms and manufacturing equipment in Silicon Valley, and commence operating it by the end of 2025.
Moving forward, Resonac will continue conducting research and development on cutting-edge packaging technologies that support the evolution of semiconductors in collaboration with US-JOINT.
*1. News release regarding the establishment of US-JOINT
https://www.resonac.com/news/2024/07/08/3116.html
*2. 2.5D packaging is a technology to place semiconductor chips in parallel on the silicon substrate, which is called “interposer.” 3D packaging is a technology to stack chips.
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